Intel Hires Fab Veteran, Former GlobalFoundries CTO Dr. Gary Patton
by Anton Shilov on December 11, 2019 6:00 PM EST- Posted in
- Semiconductors
- Intel
- GlobalFoundries
- IBM
- 10nm
- EUV
- 7nm
Intel has hired Dr. Gary Patton, the former CTO at GlobalFoundries and an ex-head of IBM Microelectronics business. Dr Patton was leading Global Foundries leading edge processes before that project was cancelled. At Intel, Dr. Patton will be responsible for design enablement, a crucial connection between process technology, yields, performance, and time-to-market of actual products.
Gary Patton most recently served as the CTO of GlobalFoundries, where he was responsible for R&D and strategic decisions associated with upcoming process technologies. He joined GlobalFoundries from IBM Microelectronics in 2015, when GF took over IBM's fabrication technologies. At IBM, he had the same role and was responsible for research and development of new semiconductor process technologies.
GlobalFoundries, as a function of spending its 14/12nm profits into its 7nm development and one of its major shareholders wanting to recoup investment in the company, last year decided to cease development of leading-edge fabrication technologies. The company ended up focusing on its profitable 14/12nm processes and working on specialized manufacturing processes, such as 22FDX and 12FDX, to avoid direct competition from TSMC and Samsung Foundry. The new focus of the company to a large degree changed the role of the CTO and other executives, and over time we have seen an exodus of personnel who have traditionally been on the leading edge.
A Future at Intel: Helping Fix The Process Flow
At Intel, Gary Patton will serve as corporate vice president and general manager of design enablement reporting to Mike Mayberry, CTO of Intel. As the head of design enablement, Dr. Patton will be responsible for creation of an ecosystem that supports implementation of products using a particular process technology. Among other things, he will lead development of process design kits (PDKs), IP, and tools. The right combination of PDK, IP, tools, and other enablers ensure that the final product meets cost, performance and time-to-market requirements.
Gary Patton will be another high-ranking executive at Intel that comes from outside of the company. In the recent years Intel hired Jim Keller to develop CPU microarchitectures and Raja Koduri to lead development of discrete GPUs for PCs, datacenters, and other applications. No only this, but Dr. Murthy Renduchintala moved from Qualcomm to Intel as its chief engineering officer in recent years.
At this time Intel has not formally made a statement as to their new hire. Dr. Patton's pages at GlobalFoundries have been removed.
We interviewed Dr. Patton at GlobalFoundries when we visited the Malta fab in 2018. You can read that interview here:
Related Reading
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- GlobalFoundries Mulls IPO Plans for 2022
- Marvell to Acquire Avera Semiconductor from GlobalFoundries
- GlobalFoundries to Sell 300mm New York Fab to ON Semiconductor
- GlobalFoundries to Sell 200-mm Fab 3E to Vanguard, Exits MEMS Business
Sources: Reuters
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Ian Cutress - Wednesday, December 11, 2019 - link
You may want to check what staff were involved with that at the time and where they are now.hunter168 - Wednesday, December 11, 2019 - link
Maybe the staff who were involved in the development of GF 28nm are at Intel developing 10nm now :)m53 - Wednesday, December 11, 2019 - link
@hunter168: Or maybe you are just trolling at the wrong website... Hint: This is not Wccftech :)hunter168 - Wednesday, December 11, 2019 - link
@m53: I would view it as a reasonable possibility. As the foundry business consolidated in the US, only two players left, GF and Intel. As we know, GF experienced several years of rough time, just like Gary Patton, its process engineers may well jump ship to Intel, which was the only place that can utilize their experiences and talents.Dragonstongue - Thursday, December 12, 2019 - link
Intel at that time was the "leader" Nvidia as well as "stuck" as you say such, so I suppose Nv was "just as guilty"these things do NOT make themselves...all of them (everyone, for sure including all the fabs) wanted return on mega investments from leading edge process.
it was through various partnerships (from GF, IBM, Samsung, TSMC, ARM et al) that "made it *possible* for us to be on the 16/14/12/7 "not true" nm that we now have.
the history was written about "as it was taking place"
I am certain a good chunk of this was IBM "breaking apart" at the time they had, or "likely" things would have not been pushed (still are being pushed over a very large section of the tech industry)
just shows how expensive these things are overall, as am sure GF, TSMC, Samsung, Intel etc would not want to be sinking billions into developing something they have little if any choice but to "move on" and spend billions more to try something different instead.
Sychonut - Wednesday, December 11, 2019 - link
I am a fap veteran too.Antony Newman - Thursday, December 12, 2019 - link
This is great news for Intel - bringing a substantial base of leading edge process knowledgefrom GF to be folded into the behemoth; hopefully he will also be giving Anandtech periodic updates and insights to the changing industry.
AJ
Kevin G - Thursday, December 12, 2019 - link
Interesting move considering that slides recently leaked about Intel's foundry plans for the next decade (spoiler: they are aiming for 1.4 nm). The death of 7 nm at GF is indicative that while the scientists and engineers can get a manufacturing process up and running, the economics may not play out to be viable. The 7 nm transition throughout the industry is expensive due to everyone wanting to leverage EUV at some point. Moving to 5 nm class will again incur an increase in capital expenses but the delta will not be as large. However, we are entering an era where moving to new nodes will have the bean counters have a greater say in the matter. A leading edge fab for 5 nm should be around $12 billion to construct with 3 nm expected to be north of $15 billion (note that the context is for new construction which tends to last for several generations with retro fits and does not include R&D costs for node development which is also several billion independently).What is capable in the labs is not the same as bringing it to mass production. 5 nm initially appears to be fine in the labs but as Intel's 10 nm process can attest to, volume production is another matter.
I would expect much great R&D on technology to move away from lithography processes going forward. Optical circuits and grown organic circuits have been demonstrated in lab environments. The feasibility of migrating those techniques to a mass production line in an economically fashion was seen as difficult. With lithography pricing continuing to increase, exploring alternatives becomes more and more attractive, even to the accountants.
mode_13h - Saturday, December 14, 2019 - link
Those node names were ASML's - not Intel's. ASML drew those on a copy of Intel's roadmap slide they got a hold of.HarryVoyager - Thursday, December 12, 2019 - link
The optics are not necessarily good, but I will admit, before I saw this, I was just thinking it would be hilarious if Intel ended up contracting Global Foundries to get them through the 10nm issues, and now, here it is!In fairness this may be a far better move than it looks on the surface. Every foundry has bad patches. Recall that TSMC's issues with 130nm hammered nVidia for years before they got it sorted out. It is quite possible that GF got their 7nm technical issues sorted out just in time to find they had no more market for their parts.