If you have read Ian's articles about Zen and EPYC in detail, you can skip this page. For those of you who need a refresher, let us quickly review what AMD is offering. 

The basic building block of EPYC and Ryzen is the CPU Complex (CCX), which consists of 4 vastly improved "Zen" cores, connected to an L3-cache. In a full configuration each core technically has its own 2 MB of L3, but access to the other 6 MB is rather speedy. Within a CCX we measured 13 ns to access the first 2 MB, and 15 to 19 ns for the rest of the 8 MB L3-cache, a difference that's hardly noticeable in the grand scheme of things. The L3-cache acts as a mostly exclusive victim cache. 

Two CCXes make up one Zeppelin die. A custom fabric – AMD's Infinity Fabric – ties together two CCXes, the two 8 MB L3-caches, 2 DDR4-channels, and the integrated PCIe lanes. That topology is not without some drawbacks though: it means that there are two separate 8 MB L3 caches instead of one single 16 MB LLC. This has all kinds of consequences. For example the prefetchers of each core make sure that data of the L3 is brought into the L1 when it is needed. Meanwhile each CCX has its own separate (not inside the L3, so no capacity hit) and dedicated SRAM snoop directory (keeping track of 7 possible states). In other words, the local L3-cache communicates very quickly with everything inside the same CCX, but every data exchange between two CCXes comes with a tangible latency penalty. 

Moving further up the chain, the complete EPYC chip is a Multi Chip Module(MCM) containing 4 Zeppelin dies.

AMD made sure that each die is only one hop apart from the other, ensuring that the off-die latency is as low as reasonably possible.

Meanwhile scaling things up to their logical conclusion, we have 2P configurations. A dual socket EPYC setup is in fact a "virtual octal socket" NUMA system. 

AMD gave this "virtual octal socket" topology ample bandwidth to communicate. The two physical sockets are connected by four bidirectional interconnects, each consisting of 16 PCIe lanes. Each of these interconnect links operates at +/- 38 GB/s (or 19 GB/s in each direction). 

So basically, AMD's topology is ideal for applications with many independently working threads such as small VMs, HPC applications, and so on. It is less suited for applications that require a lot of data synchronization such as transactional databases. In the latter case, the extra latency of exchanging data between dies and even CCX is going to have an impact relative to a traditional monolithic design.

Tensions (And Chip Sizes) Are Rising AMD’s EPYC 7000-Series Processors


View All Comments

  • Shankar1962 - Wednesday, July 12, 2017 - link

    AMD is fooling everyone one by showing more cores, pci lanes, security etc
    Can someone explain me why GOOGLE ATT AWS ALIBABA etc upgraded to sky lake when AMD IS SUPERIOR FOR HALF THE PRICE?
  • Shankar1962 - Wednesday, July 12, 2017 - link

    Sorry its Baidu
    Pretty sure Alibaba will upgrade
  • PixyMisa - Thursday, July 13, 2017 - link

    Lots of reasons.

    1. Epyc is brand new. You can bet that every major server customer has it in testing, but it could easily be a year before they're ready to deploy.
    2. Functions like ESXi hot migration may not be supported on Epyc yet, and certainly not between Epyc and Intel.
    3. Those companies don't pay the same prices we do. Amazon have customised CPUs for AWS - not a different die, but a particular spec that isn't on Intel's product list.

    There's no trick here. This is what AMD did before, back in 2006.
  • blublub - Tuesday, July 11, 2017 - link

    I kinda miss Infinity Fabric on my Haswell CPU and it seems to only have on die - so why is that missing on Haswell wehen Ryzen is an exact copy? Reply
  • blublub - Tuesday, July 11, 2017 - link

    argh that post did get lost. Reply
  • zappor - Tuesday, July 11, 2017 - link

    4.4.0 kernel?! That's not good for single-die Zen and must be even worse for Epyc!

    AMD's Ryzen Will Really Like A Newer Linux Kernel:

    Kernel 4.10 gives Linux support for AMD Ryzen multithreading:
  • JohanAnandtech - Friday, July 21, 2017 - link

    We will update to a more updated kernel once the hardware update for 16.04 LTS is available. Should be August according to Ubuntu Reply
  • kwalker - Tuesday, July 11, 2017 - link

    You mention an OpenFOAM benchmark when talking about the new mesh topology but it wasn't included in the article. Any way you could post that? We are trying to evaluate EPYC vs Skylake for CFD applications. Reply
  • JohanAnandtech - Friday, July 21, 2017 - link

    Any suggestion on a good OpenFoam benchmark that is available? Our realworld example is not compatible with the latest OpenFoam versions. Just send me an e-mail, if you can assist. Reply
  • Lolimaster - Tuesday, July 11, 2017 - link

    AMD's lego design where basically every CCX can be used in whatever config they want be either consumer/HEDT or server is superior in the multicore era.

    Cheaper to produce, cheaper to sell, huge profits.

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