AMD: We’re Using an Optimized TSMC 5nm Processby Dr. Ian Cutress on January 10, 2022 3:00 PM EST
When AMD started using TSMC’s 7nm process for the Zen 2 processor family that launched in November 2019, one of the overriding messages of that launch was that it was important to be on the leading edge of process node technology to be competitive. That move to TSMC N7 was aided by the small chiplets used in the desktop processors at the time, ensuring a higher yield and better binning curves for desktop and enterprise processors. However, between now and then, we’ve seen other companies take advantage of TSMC’s 5nm, 4nm, and talk about TSMC’s 3nm process coming to market over the next 12-24 months. During our roundtable discussion with CEO Dr. Lisa Su, I asked if the need to stay on the leading edge still held true.
To put this into perspective, AMD announced late in 2021 that it would be using TSMC’s 5nm process for its Zen 4 chiplets in enterprise CPUs in the second half of 2022. Then in early 2022, the company reiterated the use of Zen 4 chiplets, but this time in desktop processors again by the end of 2022. This is a significant delay between the first use of TSMC 5nm by the smartphone vendors, which reached mass production in Q3 2020, with Apple and Huawei being the first to take advantage. Even today, if we go beyond 5nm, Mediatek has already announced that its upcoming Dimensity 9000 smartphone chip is on TSMC 4nm and will come to market earlier this year. TSMC’s 3nm process is expected to ramp production at the end of 2022, for a consumer launch in early 2023. By those metrics, AMD is behind a process node or two by the time Zen 4 chiplets come to market later this year.
I asked Dr. Su in our roundtable about whether the need to be on the leading edge process is critical to be competitive for them. Having innovated around chiplets, I asked whether being the lead partner with foundry partners and packaging partners (known as OSATs) is of major importance, especially when the lead competition seem ready to throw money at TSMC to take that volume. How would AMD be able to aggressively assert a market-leading position in light of the complexity of manufacturing and the financial power of the competition?
Dr. Su stated that AMD is continuing to innovate in all areas. For AMD it seems, leading the chiplet technology has helped to bring the package together. She went on to say that AMD has had strong delivery of 7nm, is introducing 6nm, followed by Zen 4 and 5nm, talking about 2D chiplets and 3D chiplets – AMD has all these things in the tool chest and are using the right technology for the right application. Dr Su reinforced that technology roadmaps are all about making the right choices and the right junctures, and explicitly stated that our 5nm technology is highly optimized for high-performance computing – it’s not necessarily the same as some other 5nm technologies out there.
While not explicitly stating that the need to be leading edge is no longer critical, this messaging follows the enhanced narrative from AMD that in the era of chiplets, it’s how they’re combined and packaged that is becoming important, arguably more important than exactly what process node is being used. We’ve seen this messaging before from AMD’s main competitor Intel, where back in 2017 the company stated that it will heavily rely on optimized chiplets for each use case – this was crystallized further in 2020 suggesting 24-36 chiplets on a single consumer desktop processor for purpose-built client designs. That being said, it has been constantly rumored that Intel will be a big customer of TSMC 3nm in the following years, so it will be interesting to see where AMD can take advantage of several years of chiplet expertise and packaging tools by comparison.
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Wrs - Monday, January 10, 2022 - linkSeems a common pattern that early iterations of a process node scale poorly in frequency and current density and even yield. Thus why Intel 10nm started off in laptops and server chips, only showing up a year later in desktops. Wouldn't imagine the first N3 part to be a desktop CPU unless it's made super-wide or slow. Just makes more sense for that to be a mobile or limited-volume server part.
FreckledTrout - Monday, January 10, 2022 - linkThat example for Intel doesn't hold true. Usually what you will see especially TSMC they will make a new node for lower power. So the current 5nm that Apple chips are made on are the low power / high density process. Then about a year later they tweak the process for high power chips by making various tweaks. The 5nm node from TSMC should be tweaked out heavily for AMD by the time mass production starts.
kpb321 - Monday, January 10, 2022 - linkYield is pretty inherent. Yield always goes up as the process matures, or really the defect density goes down. This means smaller chips are always easier to manufacture earlier as a defect will at worst case make a smaller part of the wafer unusable.
Frequency isn't as straight forward AFAIK. Probably the simplest way to think about it is that a given process has a target max frequency. Say 2ghz for a low power process or 3ghz for a Mobile focused process or 5ghz for a high performance computing focused process. Early on hitting that target speed is going to be harder and give you less usable chips at that speed. That will improve over time but it's never going to give you 5ghz HPC parts from a low power process. Nothing say the HPC process can't be your first process you work on but for TSMC with Apple being their leading edge customer they are obviously going to focus on the type of process Apple needs first because that is what Apple is paying for.
coburn_c - Monday, January 10, 2022 - linkIt's almost as if TSMC's diverse customer base helps drives its fab supremacy.
Wrs - Tuesday, January 11, 2022 - linkWell yes, without the mobile revolution there was no reason for all these fabs to gear up for leading edge to the point of beating Intel. That was Intel’s mistake, declining to make low margin low power ARM stuff.
whatthe123 - Tuesday, January 11, 2022 - linkintel's mistake was coasting on its current fabs while everyone else was expanding to meet skyrocketing demand. tsmc/samsung can eat some yields to keep on schedule if they have to, intel's perpetually supply limited and seemed to live in a fantasy where they could get perfect yields on 10nm by 2017. their sudden rush to dump 100B in fabs is no coincidence, got too greedy and now they finally have to pay up.
Fulljack - Wednesday, January 12, 2022 - linkSamsung has diverse customer too, but they are comparatively has worse manufactured chips on the same (claimed) process.
Spunjji - Tuesday, January 11, 2022 - linkThis is broadly true, but Intel's 10nm is a pretty extreme example - it was a real mess and didn't make it to server chips until 3 years after the initial "launch" of some dual-core mobile chips.
"Wouldn't imagine the first N3 part to be a desktop CPU unless it's made super-wide or slow"
Not likely to be the first part, but Apple's M-series might be an early candidate for TSMC N3
ikjadoon - Monday, January 10, 2022 - linkIs it a coincidence AMD called it "high-performance computing", the same term used by TSMC to describe N4X?
December 17, 2021: "TSMC this week announced a new fabrication process that is tailored specifically for high-performance computing (HPC) products."
January 10, 2021: "Dr Su reinforced that technology roadmaps are all about making the right choices and the right junctures, and explicitly stated that our 5nm technology is highly optimized for high-performance computing – it’s not necessarily the same as some other 5nm technologies out there."
Surely, AMD knew high-performance computing has a lay definition and a very specific CPU definition (e.g., HPC aka supercomputers), so did they not notice the coincidence, they saw it and didn't care ("hype the fans!" yet won't deliver...), or they're gently confirming it? I mean, nobody would mind Zen4 on N4X...
I don't know. Don't want to start a rumor here. I'm genuinely curious; could be we're all just too plugged in and read too much into these things haha
ikjadoon - Monday, January 10, 2022 - linkSource for the TSMC N4X article: